Podcast EP53: Breker’s New CEO Weighs in on the Company, DAC and the Future of Verification

Podcast EP53: Breker’s New CEO Weighs in on the Company, DAC and the Future of Verification
by Daniel Nenni on 12-17-2021 at 10:00 am

Dan is joined by Dave Kelf, who was recently appointed CEO of Breker Verification Systems. Dave discusses Breker’s unique approach to verification of complex systems, what its future impact will be and what Breker will be doing at DAC.

The views, thoughts, and opinions expressed in these podcasts belong solely to the

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Meeting the Need for Hardware-Assisted Verification

Meeting the Need for Hardware-Assisted Verification
by Lauro Rizzatti on 04-12-2021 at 6:00 am

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Editor’s Note: Siemens EDA recently introduced a comprehensive hardware-assisted verification system comprised of hardware, software and system verification that streamlines and optimizes verification cycles while helping reduce verification cost. What follows is an edited version of an interview Verification Expert… Read More


WEBINAR: Addressing Verification Challenges in the Development of Optimized SRAM Solutions with surecore and Mentor Solido

WEBINAR: Addressing Verification Challenges in the Development of Optimized SRAM Solutions with surecore and Mentor Solido
by Daniel Nenni on 09-01-2020 at 2:00 pm

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After spending a significant amount of my career in the IP library business it was an easy transition to Solido Design. I spent 10+ years traveling the world with CEO Amit Gupta working with the foundries and their top customers. In fact, the top 40 semiconductor companies use Solido. IP companies are also big Solido users including… Read More


Using Cadence PVS for Signoff at TowerJazz

Using Cadence PVS for Signoff at TowerJazz
by Daniel Payne on 11-11-2014 at 7:00 pm

TowerJazzis a specialty foundry that provides IC manufacturing into several markets, like: RF, high-performance analog, power, imaging, consumer, automotive, medical, industrial and aerospace/defense. In June there was a presentation from Ofer Tamir of TowerJazz at DACin the Cadence theatre, so I had a chance this week … Read More


Mixed Signal SOC verification Webinar

Mixed Signal SOC verification Webinar
by Daniel Payne on 07-16-2013 at 8:29 pm

When looking at the time to design and verify an SoC we’ve known for many years now that the verification effort requires more time than the design process. So anything that will shorten the verification effort will have the biggest impact on keeping your project on schedule.

A second trend is the amount of Analog content in… Read More


Static Low-Power Verification in Mixed-Signal SoC Designs

Static Low-Power Verification in Mixed-Signal SoC Designs
by Daniel Payne on 06-19-2013 at 2:02 pm

IC designer Shubhyant Chaturvediof AMD used EDA tools from Mentor Graphicsand Concept Engineeringto perform static, low-power verification of a mixed-signal SoC design with a combined CPU and GPU. Shubhyant presented a poster session at DAC two weeks ago in Austin, and I wanted to share it with my readers here at SemiWiki.… Read More


Synopsys at DVCon: tutorial, lunch, keynote, exhibits and more

Synopsys at DVCon: tutorial, lunch, keynote, exhibits and more
by Paul McLellan on 02-24-2012 at 1:10 pm

DVCon is next week, which I’m sure you know already if you are in verification. Of course Synopsys has a rich product portfolio in verification and verification IP (VIP) so is pretty visible at the show.

On Wednesday they are sponsoring lunch. Several Synopsys customers will talk about their view of how the verification landscape… Read More