Mentor Automating Design Compliance with Power-Aware Simulation HyperLynx and Xpedition Flow

Mentor Automating Design Compliance with Power-Aware Simulation HyperLynx and Xpedition Flow
by Camille Kokozaki on 02-25-2019 at 12:00 pm

High-speed design requires addressing signal integrity (SI) and power integrity (PI) challenges. Power integrity has a frequency component. The Power Distribution Network (PDN) in designs has 2 different purposes: providing power to the chip, and acting as a power plane reference for transmission-line like propagating … Read More


Fan-Out Wafer Level Processing Gets Boost from Mentor TSMC Collaboration

Fan-Out Wafer Level Processing Gets Boost from Mentor TSMC Collaboration
by Mitch Heins on 01-20-2017 at 12:00 pm

I caught up with John Ferguson of Mentor Graphics this week to learn more about a recent announcement that TSMC has extended its collaboration with Mentor in the area of Fan-Out Wafer Level Processing (FOWLP).

In March of last year Mentor and TSMC announced that they were collaborating on a design and verification flow for TSMC’s… Read More


Mainstream PCB Design Requires a Complete Tool Platform, Too

Mainstream PCB Design Requires a Complete Tool Platform, Too
by Tom Dillinger on 07-11-2016 at 8:00 am

The EDA tool offerings for printed circuit board design commonly address one of three customer markets: (1) the enterprise design team, (2) the product development engineer, and (3) the “maker”. … Read More


Channel Operating Margin (COM) — A Standard for SI Analysis

Channel Operating Margin (COM) — A Standard for SI Analysis
by Tom Dillinger on 05-12-2016 at 12:00 pm

There’s an old adage, attributed to renowned computer scientist Andrew Tannenbaum, one that perhaps only engineers find amusing: “The nice thing about standards is that you have so many to choose from.” Nevertheless, IEEE standards arise from customer requirements in the electronics industry. Many relate… Read More


PCB Design Requires Both Speed and Accuracy of SI/PI Analysis

PCB Design Requires Both Speed and Accuracy of SI/PI Analysis
by Tom Dillinger on 04-04-2016 at 8:00 am

The prevailing industry trends are clear: (1) PCB and die package designs are becoming more complex, across both mobile and high-performance applications; (2) communication interface performance between chips (and their related protocols) is increasingly demanding to verify; (3) signal integrity and power integrity issues… Read More


Power integrity: ground, and other fairy tales

Power integrity: ground, and other fairy tales
by Don Dingee on 03-31-2013 at 8:30 pm

Ground. It’s that little downward-pointing triangle that somehow works miracles on every schematic. It looks very simple until one has to tackle modern power distribution network (PDN) design on a board with high speed and high power draw components, and you soon discover ground is a complicated fairy tale with a lot of influences.… Read More