Challenges in IP Qualification with Rising Physical Data

Challenges in IP Qualification with Rising Physical Data
by Pawan Fangaria on 12-17-2015 at 7:00 am

With every new technology node, there are newer physical effects that need to be taken into account. And every new physical effect brings with itself several new formats to model them. Often a format is also associated with several of its derivatives, sometimes an standard reincarnation of a proprietary format further evolved… Read More


Foolproof Your IP before it Stumbles in Higher-up Design

Foolproof Your IP before it Stumbles in Higher-up Design
by Pawan Fangaria on 08-06-2015 at 4:00 pm

SoC designs are increasingly becoming assemblies of a large number of IP blocks. A well integrated assembly can lead to a successful PPA (Power, Performance and Area) optimized design. However, it is equally important that each IP block is optimized, robust, and integrable in the design. The complexity of an IP and its integration… Read More


Crossfire on Continuous Path of Improvement

Crossfire on Continuous Path of Improvement
by Pawan Fangaria on 10-21-2014 at 10:00 pm

In an ever growing world of IPs, it’s essential that a tool which vouches to simplify designer’s job of IP development and help improving its quality remains versatile to encompass various formats, databases, common data models, standard libraries, scripting etc. that are used in the development of IPs and their exchange between… Read More


Dawn at the OASIS, Dusk for GDSII

Dawn at the OASIS, Dusk for GDSII
by Beth Martin on 03-28-2011 at 1:53 pm

For an industry committed to constant innovation, changes in any part of the design flow are only slowly adopted, and only when absolutely necessary. Almost 10 years ago, it became clear that shrinking process technologies would bring a massive growth of layout and mask data—rougly 50% per node. This avalanche of data seriously… Read More