Design the right chip. Design the chip right.
Every verification methodology in mainstream use answers the second half of that sentence and assumes the first. Simulation, emulation, formal, constrained-random testbenches, coverage closure — all of them take a specification as given and ask whether the implementation matches… Read More
Designing high-performance multi-chiplet semiconductor packages for hyperscale, HPC and AI applications combines cutting-edge innovation with practical optimization. Embedded silicon bridge substrates enable cost-effective solutions by using base substrates such as organic laminates or redistribution-layer (RDL)… Read More
33rd IEEE EDPS will be held at SEMI facilities in Milpitas, CA.
2026 IEEE EDPS will be held on Oct 1 at SEMI facilities in Milpitas, CA.
EDPS is a leading forum for advanced chip and systems design process development as well as CAD methodologies and addresses EDA, foundry and design industries design and manufacturing challenges.
Samsung might be the most unusual company on earth because it is difficult to decide what kind of company it actually is. To most consumers, Samsung means smartphones, televisions, refrigerators. Yet the name also appears on apartment towers, cargo ships, hospital equipment, insurance policies, construction projects, and… Read More
September 24, 2026 | 10:00 AM PDT
6G standardization is accelerating: 3GPP RAN1 is actively evaluating candidate waveforms, new duplexing schemes, and advanced channel coding proposals, with each organization running proprietary simulators under subtly different assumptions. This makes direct comparison of results nearly
Analog and custom design teams create many versions of schematics and layouts throughout the project life cycle as they optimize, verify, and refine their designs. Understanding exactly what changed between versions is critical, but it often depends on incomplete check-in comments, manual inspection, emails, or conversations… Read More
Engineering teams are dealing with increasing system complexity, stricter integration requirements and the shift toward software-defined products. Generative AI is emerging as a valuable capability, but it is not sufficient on its own.
To manage complexity and convergence across software and hardware, organizations need… Read More
About This Event
For the first time in North America, Keysight is bringing together its full Design Engineering Software portfolio in a single event. Discover how connected workflows across design, simulation, validation, software quality, optical design, and engineering data management help teams accelerate innovation,… Read More
Move Faster with Cadence Cloud, AI, and Modern Compute
Join Cadence cloud experts and industry peers for EDA Cloud Tech Day, a focused session on how cloud, AI, and modern compute are helping semiconductor and system design teams move faster, scale more easily, and reduce infrastructure barriers. Learn how Cadence Cloud supports
The reported move of Amit Gupta, Jeff Dyck, and Ryan Silk from Siemens EDA to Synopsys matters because this is more than a routine transfer of experienced executives and engineers. Together, the three represent a concentrated body of expertise in applying artificial intelligence to semiconductor design—one of the most strategically… Read More
