How are the IoT and ESL Related?

How are the IoT and ESL Related?
by Daniel Payne on 12-16-2014 at 2:00 pm

A recent comment by a DACattendee mentioned that the IoT acronym was so over-used as to make him get upset at EDA vendors that all purport to be enabling the growing IoT revolution. One of the most common requirements that I hear about IoT electronics is that the power needs to be well understood and controlled during the design exploration… Read More


Simulation and Analysis of Power and Thermal Management Policies

Simulation and Analysis of Power and Thermal Management Policies
by Daniel Payne on 11-18-2014 at 10:00 pm

Earlier this month I blogged about Power Management Policies for Android Devices, so this blog is part two in the series and delves into the details of using ESL-level tools for simulation and analysis. The motivation behind all of this is to optimize a power management system during the early design phase, instead of waiting until… Read More


Power and Thermal Analysis of Data Center and Server ICs

Power and Thermal Analysis of Data Center and Server ICs
by Daniel Payne on 08-31-2014 at 4:00 pm

The server market is a diverse, yet standardized market. The ICs and components designed and manufactured in final assemblies must meet form factor requirements for rack mount and blades. The form factor enclosures and the component placement dictate the thermal-mechanical properties and hence the thermal cooling limits … Read More


Power Modeling and Simulation of System Memory Subsystem

Power Modeling and Simulation of System Memory Subsystem
by Daniel Payne on 07-24-2014 at 11:05 am

One great benefit of designing at the ESL level is the promise of power savings on the order of 40% to 70% compared to using an RTL approach. Since a typical SoC can contain a hierarchy of memory, this kind of power savings could be a critical factor in meeting PPA goals. To find out how an SoC designer could use such an ESL approach to power… Read More


Different Approaches to System Level Power Modeling and Analysis for Early Design Phases

Different Approaches to System Level Power Modeling and Analysis for Early Design Phases
by Daniel Payne on 05-27-2014 at 3:14 pm

At DATEthis year in Dresden, Bernhard Fischer from Siemens CT(Corporate Technology) has presented an interesting summary of the various techniques used for power modeling and analysis at the architectural level. He went through the pros and cons of using spreadsheets, timed virtual platforms annotated with power numbers … Read More


Power and Thermal Simulation in ESL Verification Flows

Power and Thermal Simulation in ESL Verification Flows
by Daniel Payne on 04-18-2014 at 8:11 pm

At the recent DVcon there was a keen focus on design verification and validation. Much of the attention is on Logic/circuit design verification, UVM, and IP verification. At the system level functional verification has improved to comprehend complex hardware and software interaction using Virtual Platforms/SystemC and Transaction… Read More


Key Ingredients for ESL Power Modeling, Simulation, Analysis and Optimzations

Key Ingredients for ESL Power Modeling, Simulation, Analysis and Optimzations
by Daniel Payne on 03-07-2014 at 6:00 pm

There’s a French EDA company named DOCEA Powerthat is uniquely focused on power analysis at the ESL level and I had a chance to interview Ridha Hamza to get new insight on ESL design challenges and their approach. Ridha started out doing SRAM design at STMicroelectornics in the 1990’s, moved into the emerging field … Read More


Power and Thermal Modeling Approach for Embedded and Automotive using ESL Tools

Power and Thermal Modeling Approach for Embedded and Automotive using ESL Tools
by Daniel Payne on 01-31-2014 at 7:04 pm

Did you know that an S-class Mercedes Benz can use 100 microprocessor-based electronic control units (ECUs) networking throughout the vehicle that run 20-100 million lines of code (Source: IEEE)?

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2014 Mercedes-Benz CLA

Here’s a quick list of all the places that you will find software controlling hardware… Read More


Early Thermal and Power Simulation Using Virtual Prototyping for Pedestrian Detection Applications

Early Thermal and Power Simulation Using Virtual Prototyping for Pedestrian Detection Applications
by Daniel Payne on 12-30-2013 at 5:00 am

In the 1970’s we designed ICs first and when silicon came back then we measured the power and junction temperature. At that time there were no EDA simulation tools or models for full-chip power and temperature analysis. Fast forward to 2013 and we find that temperature and power are still demanding requirements for MPSoC … Read More