According with IPnest, the Interface IP market, including USB, PCI Express, (LP)DDRn, HDMI, MIPI and Ethernet IP segments, has reached $532 million in 2016, growing from $472 million in 2015. This is an impressive 13% Year-over-Year growth rate, and 12% CAGR since 2012!
Who integrate functions to interface a chip with others … Read More
Tag: ddrn
The IP Paradox: Sales are growing despite Semi Consolidation
IPnest is launching the “Interface IP Survey” since 2009, and we did it last September again. To build the survey as accurately as possible, I have followed the “divide and conquer” strategy. Interface protocols are varied, ranging from PCI Express, USB, or Ethernet, to memory controller (DDR3, DDR4, LPDDR3, LPDDR4 and more) … Read More
Design IP Growth Is Fueling 94% of EDA Expansion
Last June, the ESD Alliance (ESDA) has released Q1 2016 results for EDA (CAE, PCB & MCM and IC Physical), Silicon IP (SIP) and Services. Not a surprise for Semiwiki readers since 2013, the SIP category is recognized as the largest with $689 million revenues for the quarter, and four-quarters moving average increasing by 11.6… Read More
Is the IP market expected to decline by 2020?
To answer this question, I will share the results about Interface IP, more precisely the Top 5. The Top 5 protocols, USB, PCIe, Ethernet, DDRn and MIPI, are part of the interface IP market and each of them has been characterized by very strong growth rate. If you compute actual numbers for 2010 to 2014, it results to a Cumulated Annual… Read More
Which High B/W Memory to Select after DDR4?
Once upon a time, RAM technology was the driver of the semiconductor process. DRAM products were the first to be designed on a newest technology node and DRAM was used as a process driver. It was 30 years ago and the most aggressive process nodes were ranging between 1um and 1.5 um (1 500 nm!). Then in the 1990 the Synchronous Dynamic … Read More
AMD Design IP Deal with Virage Logic… Oops… Synopsys
Whoever has said that history never repeats itself should read this recent PR from AMD! The news can be summarized in three points:
- Multi-year agreement gives AMD access to a range of Synopsys design IP including interface, memory compiler, logic library and analog IP for advanced FinFET process nodes
- Synopsys acquires rights
Interface Protocols, USB3, PCI Express, MIPI, DDRn… the winner and losers in 2013
How to best forecast a specific protocol adoption? One option is to look at the various IP sales, it will give you a good idea of the number of SoC or IC offering this feature on the market in the next 12 months. Once again, if you wait for the IP sale to have reached a maximum, it will be too late, so you have to monitor the IP sales dynamic when… Read More
Interface IP (USB, PCIe, SATA, HDMI, MIPI, DDRn,…) Survey : the Introduction
The need to exchange larger and larger amount of data from system to the external world, or internally into an application, has pushed for the standardization of interconnect protocol. This allows interconnecting different Integrated Circuits (IC) coming from different vendors. Some protocols have been defined to best fit… Read More
A brief history of Interface IP, the 4th version of IPNEST Survey
The industry is moving extremely fast to change the “old” way to interconnect devices using parallel bus, to the most efficient approach based on High Speed Serial Interconnect (HSSI) protocols. The use of HSSI has become the preferred solution compared with the use of parallel busses for new products developed … Read More
MemCon 2012: Cadence and Denali
I was very happy to see that Cadence has decided to hold MEMCON again in 2012, in Santa Clara on September 18[SUP]th[/SUP] . The session will start with “New Memory Technologies and Disruptions in the Ecosystem”from Martin Lund.
Martin is the recently (March this year) appointed Senior VP for the SoC Realization Group at cadence:… Read More