Synopsys Fusion Compiler Delivers ARM Hercules-Samsung 5LPE Design

Synopsys Fusion Compiler Delivers ARM Hercules-Samsung 5LPE Design
by Daniel Nenni on 11-15-2019 at 10:00 am

There were many interesting presentations at ARM TechCon this year besides the keynote addresses by Arm, which were truly stunning for content and production value. One very interesting presentation was the talk given in the afternoon of Wednesday, October 9, 2019, titled, Synopsys Fusion Compiler for Next Generation Arm HerculesRead More


How Good Are Your Clocks?

How Good Are Your Clocks?
by Paul McLellan on 04-29-2015 at 7:00 am

One of the trickiest tasks in designing a modern SoC is getting the clock tree(s) right. The two big reasons for this:

  • the clocks can consume 30% or more of the power of the whole chip, so minimizing the number of buffers inserted is critical to keeping power under control
  • the clock insertion delay and clock skew have a major impact on
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Cadence aquires Azuro

Cadence aquires Azuro
by Paul McLellan on 07-12-2011 at 12:20 pm

Cadence this morning announced that it has acquired Azuro. Azuro has become a leader in building the clock trees for high performance SoCs. A good rule of thumb is that the clock consumes 30% of the power in an SoC so optimizing it is really important. Terms were not disclosed.

The clock trees involve clock gating which can reduce clock… Read More