Mentor Cuts Circuit Verification Time with Unique Recon Technology

Mentor Cuts Circuit Verification Time with Unique Recon Technology
by Mike Gianfagna on 07-17-2020 at 6:00 am

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Most of us will remember the productivity boost that hierarchical analysis provided vs. analyzing a chip flat. This “divide and conquer” approach has worked well for all kinds of designs for many years. But, as technology advances tend to do, the bar is moving again. The new challenges are rooted in the iterative nature of high complexity… Read More


Accelerate Your Early Design Recon

Accelerate Your Early Design Recon
by Alex Tan on 08-13-2019 at 6:00 am

A product launch nowadays demands shorter runway. SoC designers challenges are not so much in facing the unavailability of proven design capture methodologies or IP’s that could satisfy their product requirements, but more so in orchestrating the integration of all those components to deliver the targeted functionalities… Read More