Improving FPGA Prototype Debugging

Improving FPGA Prototype Debugging
by Daniel Payne on 10-30-2012 at 10:00 am

FPGA Prototyping is growing in popularity as a method to get an SoC design into hardware running at clock speeds up to 100MHz or so. One downside during traditional FPGA prototyping debug is the limited number of internal signals that you can observe while trying to chase down bugs in the hardware design in the presence of running … Read More