SPIE Days 3 and 4:
Anna Lio of Intel presented EUV resists: What’s next?
Intel wants to insert EUV at 7nm but it has to be ready and economical. Critical Dimension Uniformity (CDU), Line Width Roughness (LWR) and edge placement/stochastics are all stable on 22nm, 14nm and 10nm pilot lines.… Read More