Intel High NA Adoption

Intel High NA Adoption
by Scotten Jones on 04-24-2024 at 6:00 pm

High NA EUV Final Pre Briefing Deck 4.15.24 embargoed til 4.18 at 7am PT (1) Page 07

On Friday April 12th Intel held a press briefing on their adoption of High NA EUV with Intel fellow and director of lithography Mark Phillips.

In 1976 Intel built Fab 4 in Oregon, the first Intel fab outside of California. With the introduction of 300mm Oregon became the only development site for Intel with large manufacturing, development,… Read More


ASML Update SEMICON West 2023

ASML Update SEMICON West 2023
by Scotten Jones on 07-27-2023 at 10:00 am

12494 34 Bart Smeets Supporting future DRAM overlay and EPE roadmaps with the NXT2100i Page 21

At SEMICON West I had a chance to catch up with Mike Lercel of ASML. In this article I am going to combine ASML presentation material from the SPIE Advanced Lithography Conference, Mike’s SEMICON presentation, my discussions with Mike at SEMICON and a few items from ASML’s recent earnings call.

DUV

ASML continues to improve DUV systems.… Read More