Dan is joined by Dr. Rahul Manepalli. Rahul is an Intel Fellow and Sr. Director of Module Engineering in the Substrate Package Technology Development Organization. Rahul and his team are responsible for developing the next generation of materials, processes and equipment for Intel’s package substrate pathfinding and development… Read More
Dan is joined by Dr. Victor Moroz, a Synopsys Fellow engaged in a variety of projects on leading edge modeling Design-Technology Co-Optimization. He has published more than 100 technical papers and over 300 US and international patents. Victor has been involved in many technical committees and is currently serving as an Editor… Read More
Dan is joined by Dan Kochpatcharin, Dan joined TSMC in 2007. Prior to his current role heading up the Design Infrastructure Management Division, Dan led the Japan customer strategy team, the technical marketing and support team for the EMEA region in Amsterdam and was a part of the team leading the formation of the TSMC Open Innovation… Read More
Dan is joined by Milind Weling, the Head of Device and Lab to Fab Realization and co-founder of the neuro-inspired Computing Incubator of EMD Electronics. Previously he was senior vice president for Intermolecular. He led customer programs and operations where he drove the discovery and optimization of new materials, integrated… Read More
Dan is joined by Mike Ingster from Quantum Leap Solutions (QLS) and Ken Potts from Alphacore. Mike and Ken explain how QLS and Alphacore collaborate to provide industry-leading IP and system solutions to their mutual customers. The markets served by both QLS and Alphacore are discussed and the synergies are explained in this informative… Read More
Dan is joined by Carl Moore, a semiconductor and yield management expert with a career spanning 40 years. Carl’s held technical management positions across product and test engineering, assembly, manufacturing, and design at established semiconductor companies. Carl is passionate about data analytics and has a reputation… Read More
Dan is joined by Sean Redmond, managing partner for Silicon Catalyst. Sean has nearly 40 years of experience in the semiconductor and software industries including stints at VLSI technology, Verisity Design, Cadence, ARC, and others. Sean has recently worked closely with the UK government on industrial digital strategy, co-chairing… Read More
Dan is joined by a panel of experts to discuss chiplets and 2.5/3D design. The panelists are: Saif Alam – Vice President of Engineering at Movellus Inc., Tony Mastroianni Siemens EDA- Advanced Packaging Solutions Director and Craig Bishop – CTO Deca Technologies.
In this spirited and informative discussion the … Read More
Dan is joined by William Ruby, director of product management for Synopsys Power Analysis products. He has extensive experience in the area of low-power IC design and design methodology, and has held senior engineering and product marketing positions with Cadence, ANSYS, Intel, and Siemens. He also has a patent in high-speed… Read More
Dan is joined by Stephen Fairbanks, CEO of Certus Semiconductor. Stephen is an ESD pioneer with over 30 years of experience starting with his time at Intel, SRF Technologies, and now Certus Semiconductor.
Stephen describes the varied challenges of ESD andI/O library design presented by today’s technologies and design… Read More
Will 50% of New High Performance Computing (HPC) Chip Designs be Multi-Die in 2025?