Customer case studies have always been my favorite source of information. Press releases are a great start but there is always more to the story. Fortunately, I had the opportunity to speak with Sumit Vishwakarma, principal product manager at Siemens EDA about their recent press release with Interchip. I was an advisor to Berkeley… Read More




A Game-Changer for IP Designers: Design Stage Verification
In today’s rapidly evolving semiconductor industry, the design and integration of intellectual property (IP) play a pivotal role in achieving competitive advantage and market success. Whether sourced from commercial IP providers or developed in-house, ensuring that IP designs are compliant with signoff requirements… Read More
How MZ Technologies is Making Multi-Die Design a Reality
The next design revolution is clearly upon us. Traditional Moore’s Law is slowing, but the exponential demand for innovation and form factor density is not. When you can no longer get it done with a single monolithic chip, moving to a multi-die approach is the answer. This emerging design methodology has many challenges – supply… Read More
SPIE Let there be Light! High NA Kickoff! Samsung Slows? “Rapid” Decline?
– High NA EUV’s coming out party – “Dawn” of the Angstrom Era
– Well attended, positive vibes, not much new but good progress
– Concerns about Samsung slowing spend while Intel accelerates
– KLA reticle inspection quandary – Risky business in China
SPIE was a High-NA
… Read MorePodcast EP210: How VSORA is Opening New Horizons for Generative AI and ADAS Applications
Dan is joined by Jan Pantzar vice president of sales and marketing at VSORA, a provider of high-performance generative AI and ADAS chip solutions based in France. Mr. Pantzar gained extensive experience in the semiconductor, IP and software industries through building and managing organizations around the globe. Previous … Read More
CEO Interview: Larry Zu of Sarcina Technology
Larry has grown Sarcina from designing semiconductor packages for a few small companies, to doing package designs for top semiconductor companies around the world. From 2014 to 2018, Larry led the expansion of Sarcina beyond package design into final test and wafer sort hardware and software development.
Larry is a semiconductor… Read More
WEBINAR: Chipmakers can leverage generative AI to speed up RTL design and verification
The subjects of Generative AI and Large Language Models (LLMs) permeate businesses and the public conversation. It’s not without good reason! While this emergent field of AI develops, it is now seen at a minimum as a valuable assistant, or, often, a dramatic accelerant to productivity, even to technical workflows.
As we’re … Read More
2024 Outlook with Adam Olson of Perforce
Perforce is a company that provides software solutions primarily focused on version control, especially for large-scale development projects. Version control systems manage changes to documents, computer programs, large web sites, or other collections of information. Perforce’s main product is Helix Core, formerly… Read More
WEBINAR: Enabling Long Lasting Security for Semiconductors
Today we live in a world where technology is a part of our everyday lives, not only our personal data, but all devices we rely on on a daily basis including our automobiles, cell phones, and home devices. Hackers have found creative and novel ways to corrupt these products, disable systems, steal secrets and threaten our identities.… Read More
Soft checks are needed during Electrical Rule Checking of IC layouts
IC designs have physical verification applications like Layout Versus Schematic (LVS) at the transistor-level to ensure that layout and schematics are equivalent, in addition there’s an Electrical Rules Check (ERC) for connections to well regions called a soft check. The connections to all the devices needs to have the most… Read More
CEO Interview with Ido Bukspan of Pliops