3D IC was a very popular topic at DAC. The era of heterogeneous, multi-chip design is here. There were a lot of research results and practical examples presented. What stood out for me was a panel at the end of day two of DAC that was hosted by Siemens. This panel brought together an impressive group of experts to weigh in on what was really… Read More
Arteris Highlights a Path to Scalable Multi-Die Systems at the Chiplet SummitAt the recent Chiplet Summit, presentations, discussions and…Read More
Captain America: Can Elon Musk Save America's Chip Manufacturing Industry?Intel has posted three consecutive years of falling…Read More
WEBINAR: Reclaiming Clock Margin at 3nm and BelowAt 3nm and below, clock networks have quietly…Read More
WEBINAR: HBM4E Advances Bandwidth Performance for AI TrainingThe rapid proliferation of LLMs and other AI…Read More
Siemens Wins Best in Show Award at Chiplet Summit and Targets Broad 3D IC Design EnablementThe recent Chiplet Summit in Santa Clara was…Read MoreAnalysis and Exploration of Parasitic Effects
With advanced semiconductor processes continuing to shrink, the number and complexity of parasitic elements in designs grows exponentially contributing to one of the most significant bottlenecks in the design flow. Undetected parasitic-induced issues can be extremely costly, often resulting in tape-out delays.
Silvaco… Read More
Siemens Proposes Unified Static and Formal Verification with AI
Given my SpyGlass background I always keep an eye out for new ideas that might be emerging in static and formal verification. Whatever can be covered through stimulus-free analysis reduces time that needn’t be wasted in dynamic analysis, also adding certainty to coverage across that range. Still, advances don’t come easily. … Read More
Memory Innovation at the Edge: Power Efficiency Meets Green Manufacturing
By Tetsu Ho
With the ever-increasing global demand for smarter, faster electronic systems, the semiconductor industry faces a dual challenge: delivering high-performance memory while reducing environmental impact. Winbond is meeting this challenge head-on by embedding sustainability into every layer of its operations—from… Read More
Alchip Launches 2nm Design Platform for HPC and AI ASICs, Eyes TSMC N2 and A16 Roadmap
Alchip Technologies, a global leader in high-performance computing (HPC) and AI infrastructure ASICs, has officially launched its 2nm Design Platform, marking a major advancement in custom silicon design. The company has already received its first 2nm wafers and is collaborating with customers on the development of high-performance… Read More
Agile Analog Update at #62DAC
On the last day of DAC 2025 I met with Chris Morrison, VP of Product Marketing at Agile Analog, to get an update. Their company provides Analog IP, the way you want it, and I knew that they had internal tools and a novel methodology to speed up the development process. This year they have started talking more about their internal IP automation… Read More
Accelerating IC Design: Silvaco’s Jivaro Parasitic Reduction Tool
In Silvaco’s July 2025 video presentation at the 62nd Design Automation Conference (DAC), Senior Staff Applications Engineer Tim Colton introduced Jivaro, a specialized parasitic reduction tool designed to tackle the escalating challenges of post-layout simulation in advanced IC designs. As semiconductor nodes… Read More
Protecting Sensitive Analog and RF Signals with Net Shielding
By Hossam Sarhan
Communication has become the backbone of our modern world, driving the rapid growth of the integrated circuit (IC) industry, particularly in communication and automotive applications. These applications have increased the demand for high-performance analog and radio frequency (RF) designs.
However, designing… Read More
Executive Interview with Matthew Addley
Matthew Addley is an Industry Strategist at Infor, specializing in the global manufacturing sector. With over 30 years of experience in driving business transformation through technology, he aligns industry needs with Infor’s product strategy through thought leadership, customer engagement, and market insight. Beginning… Read More
CEO Interview with Jonathan Reeves of CSignum
For more than 30 years, Jonathan has successfully led many start-up ventures, including multiple acquisitions as well as senior operating roles in networking, cloud computing, cybersecurity, and AI businesses.
He co-founded Arvizio, a provider of enterprise AR solutions, was Chairman and co-founder of CloudLink Technologies,… Read More


Silicon Insurance: Why eFPGA is Cheaper Than a Respin — and Why It Matters in the Intel 18A Era