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The semiconductor industry has been responding to increasing device complexity and performance requirements in multiple ways. To create smaller and more densely packed components, the industry is continually advancing manufacturing technology. This includes the use of new materials and processes, such as extreme ultraviolet… Read More
Last week TSMC announced the opening of an advanced backend fab for the expansion of the TSMC 3DFabric System Integration Technology. It’s a significant announcement as the chip packaging arms race with Intel and Samsung is heating up.
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The original vision for Certus Semiconductor in 2008 was to leverage production I/O Libraries from more significant partners, starting with Freescale, and take it to smaller external customers for licensing. This IP was proven and validated, with an excellent silicon track record and big company support; in our minds, we thought,… Read More
I don’t know about you, but when I think of mission-critical applications, I immediately think of space exploration or military operations. But in today’s world, mission-critical applications are all around us. Think about the cloud and how data is managed, analyzed, and shared to execute any number of tasks that have safety … Read More
In the 3D-IC (Three-dimensional integrated circuit) chip design method, chiplets or wafers are stacked vertically on top of each other and are connected using Through Silicon Vias (TSVs) or hybrid bonding.
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At the 2023 VLSI Symposium on Technology and Circuits, Intel presented two papers on their PowerVia technology. We received a pre-conference briefing on the technology embargoed until the conference began and received the papers.
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Dan is joined by Carl Moore, a Yield Management Specialist at yieldHUB. Carl is a semiconductor and yield management expert with more than 35 years of experience in the industry. Carl has held technical management positions across product and test engineering, assembly, manufacturing, and design.
Carl explains what “dirty… Read More
Dr. Wei has served as CEO & CTO of Easy-Logic since 2020. Prior to this role, Dr. Wei served as CTO since 2014 where he constructed the core algorithm and the tool structure of EasyECO. As the CEO, Dr. Wei focuses on building a strong company infrastructure. In his CTO role he interfaces with strategic ASIC design customers … Read More
Who first came up with this term shift-left ? I’d assumed Siemens EDA as they use it so widely. But their latest white paper on the productivity improvements possible with shift-left Calibre IC verification flows puts the record straight: a software engineer called Larry Smith bagged the naming rights in a 2001 paper (leapfrogging… Read More
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Rethinking Multipatterning for 2nm Node