The Verification Systems Engineer plays a pivotal role in functionally verifying bleeding-edge features of the EPU as they are developed, from end to end. You will collaborate closely with micro-architects to gain an intimate, low-level understanding of new hardware features as they are developed. You will leverage this knowledge to develop and maintain software systems to functionally model and verify these features, including targeted directed tests and complex random test benches, written primarily using modern C++ and SystemC. Your experience using the systems you build to detect and diagnose bugs will be critical toward our effort to build fully functional products. You will also document and communicate feature specs to the software team to enable usage of the features you verify, giving you a view of the full stack. Ideal candidates will have a strong background in software development and systems-level programming, as well as knowledge of microarchitectural concepts and a willingness to take initiative to grow and learn more about architecture design and tools.
- Define DV requirements for design changes resulting from rapidly evolving AI/ML models; work with engineers across domains to understand real-world use cases
- Partner with other members of the verification, as well as architects and designers, to functionally verify entire blocks of the Quadric EPU by designing, implementing, and maintaining custom directed and random testing systems
- Collaborate directly with micro-architects on new features and develop test plans from scratch
- Develop complex random kernel generators using modern C++
- Maintain CI/CD pipelines to ensure broad test coverage using Python and Jenkins
- Document and communicate the specifications of new hardware features to the software team and support initial efforts to enable usage by programmers
- Proficiency in modern C++ (>= 11)
- Experience building end-to-end software systems using tools such as Python, CMake, Clang/GCC, Git, Jenkins
- Knowledge of microarchitecture design concepts such as pipelines, caches, memory controllers, etc
- Background in low-level systems programming that interacts directly with hardware, such as operating systems, compilers, firmware, device drivers, linkers, bootloaders, etc
- Understanding of statistical distributions such as Gaussian, Lognormal, Geometric
- Excellent communication and documentation skills
- Master’s degree in CS/CE and at least 2 years of experience in a Verification role
Nice to haves:
- Knowledge of industry-leading verification frameworks such as UVM
- Knowledge of SystemC and/or SystemVerilog
- Experience with random stimulus as well as functional coverage
Expected Outcomes in 12 months:
- Verify a large subset of the features in quadric’s next-generation architecture.
- Ownership of multiple block-level test benches
- Ability to isolate/debug test bench and design problems
- Provide competitive salaries and meaningful equity
- Provide catered lunches, commuter benefits & solid choice of healthcare plans
- Provide a politics-free community for the brilliant minds who want to make an immediate impact
- Provide an opportunity for you to build long term career relationships
- Foster an environment that allows for lasting personal relationships alongside professional ones
Founded in 2016 and based in downtown Burlingame, California, Quadric is building the world’s first supercomputer designed for the real-time needs of edge devices. Quadric aims to empower developers in every industry with superpowers to create tomorrow’s technology, today. The company was co-founded by technologists from MIT and Carnegie Mellon, who were previously the technical co-founders of the Bitcoin computing company 21.
Quadric is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, religion, sex, national origin, sexual orientation, age, citizenship, marital status, or disability.
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