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lEAD DFT Engineer

lEAD DFT Engineer
by Daniel Nenni on 09-15-2020 at 3:22 pm

Website Truechip

Post:
lEAD DFT Engineer
Required Experience:
5 to 7 yrs
Location:
Delhi-NCR or Bangalore
Openings
5-8
Education
BE/ BTech (Electronics/ Electrical/ Electronics and Communication) OR MS/ MTech would be preferred
Core competencies:
The candidate should have :

Led a DFT team for at least two SOCs
A hold over the complete flow i.e. scan, atpg, structures for delay test, coverage analysis, memory testing, netlist simulations and pattern delivery.
Ability to decide on the take decision on approaches
Ability to decide on the the schedule and effects on it due to different approaches.
Exposure to LBIST, mixed-signal testing and post-silcon bring up
Exposure to timing or synthesis and should be able to decide on the constraints for the same.
Ability to mentor the junior team members and drive them for achieving best results.
Ability to communicate and discuss options with the client.

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To view the job application please visit www.truechip.net.