Trainee Software Development Engineer for NoC generation

Website ArterisIP
Description
Arteris enables engineering and design teams at the world’s most transformative brands to connect and integrate today’s system-on-chips (SoCs) that fuel modern innovation.
If you’ve held a smartphone, driven an electronic car, or powered up a smart TV, you’ve come in contact with what we do at Arteris. Here, the future is quite literally in your hands—and when it isn’t, chances are it is flying overhead in a drone, a satellite, or in the cloud at a datacenter!
Subject: Automatic optimisation of an existing NoC topology to meet performance requirements
As a Trainee Software Development Engineer for NoC generation at Arteris, your role will be improve existing solutions and develop new methods that enable a NoC to meet performance constraints at several levels:
- Search for the most optimal network configuration in terms of clock frequencies and data serialisation, without modifying the topology.
- Automatic and intelligent insertion of architectural components to regulate traffic and improve performance: FIFOs, flow adapters, etc.
- Complex topology transformations to minimise latency and reconfigure traffic distribution.
Your approach will combine exact graph processing algorithms with operational research and heuristic methods. In addition to functionality, your challenge will be to ensure that the solution produces results in the shortest possible time (minutes).
Key responsibilities:
- Specify and develop algorithms that take into account the physical placement constraints and performance of a NoC
- Integrate these new solutions into existing software
- Work with application engineers to understand customer needs
- Set up tests to validate the approach
Requirements
- You are in your final year of an engineering school or university course at Bac+5 level, specialising in IT and/or microelectronics.
- You have a good academic level in object-oriented programming languages
- You have knowledge of operational research / combinatorial optimization
- Knowledge of good software development practices, code management tools (GIT) and bug management tools (JIRA) is appreciated.
- As the company operates in a multicultural environment, fluency in English is highly recommended.
Education requirements:
Bac +5
About Arteris :
Arteris is a leading provider of system IP for the acceleration of system-on-chip (SoC) development across today’s electronic systems. Arteris network-on-chip (NoC) interconnect IP and SoC integration automation technology enable higher product performance with lower power consumption and faster time to market, delivering better SoC economics so its customers can focus on dreaming up what comes next.
With over 250 employees with headquarters in Silicon Valley and offices around the globe, we are a catalyst for SoC innovation so companies ranging from startups to the biggest technology market leaders can effectively create new products with proven connectivity flexibility and ease. Learn more at arteris.com.
Apply for job
To view the job application please visit www.arteris.com.
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