Systems SERDES Engineer

The Alphawave IP team combines technologists from different disciplines who come together with a shared passion for electronics, software, and communication technology. We look for individuals with a deep desire to build great products and we value collaboration, curiosity, and a commitment to solving hard problems.

What You’ll Do          

• Run behavioral channel simulation and analysis of high-speed wireline analog/DSP SERDES for 100G+ PAM4 standards
• Model complex analog blocks, such as Transmitter, FFE, CTLE, DFE, and CDRs
• Contribute to Architecture definition for SERDES links for several standards
• Contribute to and help develop adaptation algorithms for a variety of equalization techniques
• Perform sensitivity analysis and regression simulations for various link conditions
• Work with internal silicon engineering team to help perform system performance correlation between behavior models and silicon

What You’ll Need

• Masters/PhD in Electrical/Computer Engineering or Engineering Science
• 5+ years of experience is preferred
• Previous experience with modelling critical SERDES blocks such as Transmitter, FFE, CTLE, DFE, and CDRs
• Strong programming skills in MATLAB, C/C++, scripting skills in Python, Tcl, Perl
• Experience working with PCIe and/or Ethernet SerDes specifications

It’d Be Amazing If You Had

• IBIS-AMI modelling experience
• Familiarity with PCI-SIG, IEEE 802.3 and OIF standards

About You

• Extremely detail oriented
• Superb analytical and problem-solving skills
• Excellent communication skills
• Able to listen to and appreciate ideas and opinions that differ from yours
• Drive for consistency
• Takes personal pride in high standard of outputs
• Self-motivated and self-managing