Seeking a highly motivated engineering student willing to learn Digital Design Verification, which is the most important step of product development process. Design Verification aims to confirm that the design complies with the Protocol Standards and System Requirements before it is developed into a chip. Exhaustively verifying functionality in the design phase allows engineers to catch bugs early in the development cycle where they are cheaper and easier to fix. Designs have become more complex due to the decrease in process node technology and to the increase in the number of logic blocks hence the high demand for Digital Design Verification Engineers.
The candidate will be involved in verifying current and next generation Backplane Ethernet, PCIe, SATA and USB 2/3, and/or MIPI CPHY/DPHY SERDES products. The position offers an excellent opportunity to work with digital and mixed signal design engineers responsible for delivering high-end mixed-signal designs.
Starting in May 2023, this 16-month internship position will be with our Solutions Group in Mississauga.
What you will learn:
- Defining and tracking Verification Testplans
- Designing and writing constrained-random SystemVerilog testbenches using a Verification Methodology such as UVM (Universal Verification Methodology) or VMM (Verification Methodology Manual)
- Creating and examining Functional Coverage
- Writing SystemVerilog assertions
- Debugging RTL and gate-level simulation failures
- Firmware Debug
- Bug Tracking using Software Tools such as Jira
- SystemVerilog analog behavior modelling
- Code Coverage Analysis
- Experience writing scripts in languages such as Perl and Unix shell
- Familiar with Verilog and SystemVerilog
- Enrolled in Computer Engineering or Electrical Engineering program, or similar
Apply for job
To view the job application please visit sjobs.brassring.com.