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Staff Post-Silicon Validation Engineer

Staff Post-Silicon Validation Engineer
by Admin on 06-30-2022 at 1:56 pm

Website Achronix

Job Description

Achronix Semiconductor Corporation is a fabless semiconductor corporation based in Santa Clara, California, offering high-performance FPGA solutions. Achronix is the only supplier to have both high-performance and high-density standalone FPGAs and embedded FPGA (eFPGA) solutions in high-volume production. Achronix’s FPGA and eFPGA IP offerings are further enhanced by ready-to-use PCIe accelerator cards targeting AI, ML, networking and data center applications. All of Achronix’s products are supported by best-in-class EDA software tools.

Position Profile Name: Staff Post-Silicon Validation Engineer

Requisition No.: 6200-1024

Type of Position: Regular, Exempt

Reports to: Hardware Engineering Director, Core Technology

Department:

Hardware Engineering (US)

Location: Santa Clara, California

Contact: hr@achronix.com

Job Description/ResponsibilitiesThe successful candidate will lead a team of post-silicon validation engineers towards the productization of high-performance FPGAs in 7nm and below. His or her responsibilities will include the following:

  • Working with leading-edge protocols, including PCIe Gen5, 400Gbps Ethernet, die-to-die communications and high-speed external memory interfaces like GDDR6, HBM and DDR5
  • Driving the bring-up, hardware validation and debug of new FPGA products; tracking the bringup and validation schedules through to completion
  • Owning the generation and maintenance of detailed test plans based on specifications, outlining validation experiments and procedures
  • Selection, acquisition and set-up of required test equipment and software, leveraging automation wherever possible
  • Analyzing results and measurements, developing visualizations to assist in deeper understanding of data
  • Collaborating with hardware and software teams to resolve hardware issues and optimize results
  • Collaborating with the operations team to optimize parametric yield from high volume ATE tests
  • Mentoring and guiding junior engineers

Skills and Qualifications

  • MS in Electrical/Computer Engineering with 8+ Years of experience in post-silicon validation
  • Proficiency in scripting languages such as Python, Perl and TCL
  • Proficiency in tools and methods for data collection and organization
  • Expertise in high-end serial protocols like PCIe Gen3/4/5 and 100/200/400Gbps Ethernet, high speed external memory interfaces, memory protocols like DDR4/5 and PLLs and IO standards
  • Familiarity with test and measurement equipment – high-bandwidth Oscilloscopes, BERTs, serial and memory protocol analyzers and exercisers
  • Familiarity with signal integrity and power integrity aspects of high speed interfaces, packages, PCBs and measurement equipment is a plus
  • Experience with FPGA design and implementation is desirable
  • Excellent debugging skills
  • Excellent verbal and written communication skills
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