SoC Design Verification Engineer

Job Description

• Develops pre-silicon functional validation strategy, test plan, test suite, test methodologies for state-of-the-art SoC/chipset.
• Collaborates with architects, micro-architects, design and system validation teams for SoC validation strategy, technical readiness and failure disposition.
• Performs low level and complex debug for multiple systems, subsystems within a product, or at the SoC level for Intel products.
• Applies deep understanding of SoC design, architecture, firmware, and software to resolve triage failures, marginality issues, and conduct root cause analysis.
• Defines, develops, and implements techniques for faster debug at the SoC and platform level and isolates failing components of a system.

Qualifications

• Experience in SoC or IP validation through multiple full project cycles to gather in-depth experience in validation skillsets and design knowledge with more than 5 years of relevant experiences.
• Knowledge on Computer System Architecture and/or related software-hardware sub-systems.
• Experience with software programming in Python, Maestro/Perspec, C and/or C++ language and UNIX, automate verification flow and improve efficiency.
• Experience on Emulation/Silicon/FPGA debug, RTL, UPF and logic design.
• Experience in using standard industry verification tools such as Simics, Verdi, etc.
• Experience in leading a new SoC/IP Validation from validation strategy, coverage planning, test plan writeup and content development, as well as SoC/IP debug.
• Strong in problem solving, debugging various simulation failures, formal verification etc.
• Strong written and oral communication skill, able to communicate well with counterparts and key stakeholders including cross-site partners.