Intel engineers build next gen FPGA which change how consumer interact, explore, and connect. As Signal and Power Integrity Design Engineer, you will lead/participate projects involving SIPI electrical specification definition, modeling, analysis, and verification for Intel PSG products.
- You will be part of an engineering team to work on the current and next generation product definition and address the key design and methodology challenges.
- You will work closely with multiple teams across IC Design, Layout, Packaging, Board, Product Engineer, Test Development, Application, Technical Service and Software to address the SIPI requirement from die, package to board level.
- We are looking for members who is passionate, creative, and motivated to take risk on solving new problem.
1. Work closely with cross-functional team and internal working group on every generation of product development in signal and power integrity, platform interfaces (PCIE, DDR, Ethernet, GPIO, NRZ..etc)
- Deliver SIPI simulation and data analysis and provide design optimization to ensure package/board design meeting product specification.
- Ensuring timely SIPI simulation and design optimization of cost optimal high-quality package substrates, board designs after reviews with internal stakeholders.
- Manage SIPI verification issue and highlight to EE lead. Follow up closely issue raised.
- Timely documenting SIPI related collateral per process with no quality issue
- Perform passive lab measurement (TDR and VNA) and Passive PDN measurement and FCN related activities.
- Validated the data against spec and collaborate fixes if needed to feedback on the next derivation silicon.
- Collaborate with working group leads for signal measurement test plans and review of measurement results.
- Deliver channel optimization (board and package), model creation and verification and simulate the overall performance to meet the channel performance. Document reports and BKM for future references.
- Work closely with Validation Engineer to define characterization and simulation correlation plan
- Generate DOE and eye diagram analysis and provide recommendation for design guide
2. Be part of the team to develop and enhance next generation product and methodology
- Develop automation script and enhance SIPI verification process
- Innovative solutions for continuous improvement in efficiency and throughput
- Driving/Providing inputs to the working group to enable development of industry-leading designs
a. BSEE/MS in Electrical/Electronic Engineering or equivalent with minimum of 5 years working experience in Signal and Power Integrity Analysis
b. Good technical knowledge in PDN and Signal Integrity
c. Good communication and interpersonal skills
d. Self-starter and with the ability to multi-task across several projects simultaneously
e. Knowledge of the following tools or equipment will be value added
- Apache Redhawk and Totem, HSpice, Sigrity, Agilent ADS, Ansoft (HFFS, Q2D, Q3D), Cadence (Allegro, PowerSI, XtractIM), Cadence Virtuoso, Synopsys PrimeRail
- Vector Network Analyzer (VNA), oscilloscopes, TDRs
- Experience designing IO circuits, PLLs, DLLs, voltage regulators, or other analog/mixed-signal circuits
- Experience with high-speed signaling measurement tools and techniques: spectral analyzer, oscilloscope, TDR, VNA, BERT
- Experience with statistical analysis tools and techniques: DOE, JMP, etc.
Apply for job
To view the job application please visit jobs.intel.com.