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System Verification Engineer

System Verification Engineer
by Daniel Nenni on 09-12-2020 at 6:30 pm

Responsibilities

Bring up Silicon designs on FPGA platforms, root causing design, test and emulator environment issues failures

Collaborate with cross-functional teams on developing and implementing emulation strategy based on product goals

Build up an emulation environment to establish readiness for silicon and software bring-up through co-working with cross-functional teams
Requirements

A minimum of 3 years of direct system level debug experience especially on Linux system, including system testing and debug using FPGAs and emulators

Strong FPGA platform based development and testing experience using iLA and LA

Strong and wide knowledge on system software especially on Linux kernel and CPU micro-architecture

Solid understanding of processor, memory, bus protocol,  and SoC architecture, or a strong desire and ability to learn the same.

Familiarity with and/or ability to learn languages and methodologies that are not part of the industry-standard approach to verification (Scala, Chisel, etc.)

A conscientious and thorough approach to Design Verification.

Good interpersonal skills to listen to diverse points of view and influence people from different disciplines.

An unwavering dedication to product quality

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