Senior Verification Engineer

We are looking for a Sr. Verification Engineer with solid expertise in functional hardware verification domain. The candidate must be able to carry out independent tasks with little supervision and collaborate closely with both customers and other team members.

This position requires dealing with customers located abroad. On-site visits of various durations will be needed. The person in this position must enjoy being part of a dynamic, creative and open-minded team and working in cross-cultural environments. Passion, initiative, and autonomy are highly appreciated.

Responsabilities

• Understand the specification of the device under verification and develop the verification plan
• Report DUV specification issues to customer
• Develop and debug the verification environment, complying with customer’s required methodology
• Run and debug simulations or regressions until verification goals are achieved
• Debug RTL issues and report them to customer
• Perform environment maintenance activities
• Contribute to the project’s infrastructure (scripts, make-files, etc)
• Document code and write documentation according to customer’s requirements
• Consult with team members and customer on solutions and issue handling
• Participate in reviews and actively contribute to the verification project
• Report progress to customer’s management or responsible persons

Required Skills and Qualifications

• Experience with VIP development
• Experience (5+ years) with one or more of the SystemVerilog, e or SystemC languages and the associated methodologies UVM/OVM, eRM or VMM
• Excellent knowledge of the functional verification tool chain (simulators, linters, regression managers etc.)
• Excellent knowledge of functional verification flow and support tools (issue tracking, source control, release process etc.)
• Proficiency in Linux and shell scripting
• Demonstrated success in previous projects
• Ability to prioritize, schedule and meet deadlines
• Good problem solver, having the capability to cope with incomplete specifications
• Strong sense of accountability and follow through
• Strong interpersonal and communication skills
• Good English communication skills, both written and verbal
• Availability to work abroad for short periods of time
• Bachelor degree in Electronics/Telecommunications, Computer Science or Mathematics

Nice to Have

• Design experience with Verilog or VHDL, or FPGA prototyping
• Practical knowledge in developing SystemC or Matlab models
• Experience with TLM/TBA modeling
• Programming experience with C/C++ or Java
• Software design patterns knowledge

How to Apply

Just upload your resume in the form below and leave a valid e-mail address or submit your resume directly to careers@amiq.com and write Sr. Verification Engineer in the “Subject” line.