As a Senior Staff Software Engineer at Arteris, you will have a leading role in the development of next generation of Arteris IP solutions, enabling the design of extremely configurable digital logic blocks.
We intend to revolutionize the way to design SoC, and we are looking for engineering talents willing to expose themselves to new software languages and ready to learn and grow his competences to both software development and digital hardware design.
The candidate will be in charge to develop the next generation of Network On Chip synthesis software and underlying data models and API.
The position will be ideally staffed in Sophia Antipolis, France, as part of the advanced engineering team.
You will join a proven-successful company and be able to shape the future of System on Chip design.
- Specify, develop and test the next generation of NoC synthesis tool suite.
- Innovate on new idea by creating fast models to prove the concept.
- Architecture the software layer stack to make your modules as re-usable as possible.
- Communicate with Hardware, Software and Documentation teams about your changes to ensure product cohesion.
Experience Requirements / Qualifications:
- 8+ years of experience in SW development,
- Proficient in Object Oriented programming (Java, C++, Scala, Python…),
- Experience with GUI framework (Qt, Java Eclipse, …),
- Experience with data structures, algorithms and compilers,
- Excellent problem solving, strong communication and teamwork skills,
- Self-driven, able to work with minimum supervision.
- Fluent in French and English
- Had work within Electronic Design Automation environment, and know basic logic design environment and methodology,
- Knowledges in HW description language (Verilog, system Verilog, …),
- Experience with digital HW generators, methodology and concept.
- PhD or master’s degree in Computer Sciences or related field.
Location: position based on Biot (06) – Remote possible 1 day per week
Apply for job
To view the job application please visit www.arteris.com.