Senior Physical Design Engineer
Details of job profile:
- Perform RTL to GDSII tasks such Synthesis, PnR, CTS, Statis Timing Analysis, Physical verification and ensuring clean sign off.
- Develop and maintain the tool flow to support the project
- Work with Team to enhance PD methodology
- LEC, CDC
Basic Qualifications & Skills
- Experience in advanced node processes 07nm and 05nm
- Experience with industry standard tools, preference for Cadence flow
- Understanding of RTL to GDSII flow
- Understanding of timing constraints and static timing analysis (STA)
- Experience with Synthesis, CDC (Clock Domain Crossing Checks), LEC (Logic Equivalence Checks), automation through scripting such as Perl, Python, Tcl & Make
Huawei’s and SMIC’s Requirement for 5nm Production: Improving Multipatterning Productivity