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Senior EDA Software Validation Engineer (Strong HW background -HSI)

Senior EDA Software Validation Engineer (Strong HW background -HSI)
by Admin on 12-22-2023 at 3:27 pm

  • Full Time
  • Paris, France
  • Applications have closed

Website ArterisIP

Description

Arteris enables engineering and design teams at the world’s most transformative brands to connect and integrate today’s system-on-chips (SoCs) that fuel modern innovation.

If you’ve held a smartphone, driven an electronic car, or powered up a smart TV, you’ve come in contact with what we do at Arteris. Here, the future is quite literally in your hands—and when it isn’t, chances are it is flying overhead in a drone, a satellite, or in the cloud at a datacenter!

As a Senior EDA Software Validation Engineer at Arteris, you will have opportunity to be part of a validation team with leading-edge Electronic Design Automation expertise and you will work on the most advanced SoC assembly and Hardware/Software interface flows.

You will join a proven-successful company, and be able to influence development environment, architecture, verification, and everything in-between.

Responsibilities:

  • Definition, documentation, development, and execution of validation tests for Arteris Register Bank compiler in Python, Perl and C++ language, able to run on any available RTL simulator (Cadence, Synopsys, etc.) and proficient with IP-XACT, UVM RAL and C HAL.
  • Maintain and enhance tests in the continuous integration flow, improve metrics, and increase automation.
  • Help improve and refine processes, methodologies, and metrics.

Experience, Requirements and Qualifications:

  • 7+ years of industry experience as semiconductor CAD flow developer (Electronic Design Automation).
  • Demonstrated experience designing and building software frameworks to assemble and verify complex System-on-Chips.
  • Understanding of Hardware RTL design and verification languages (VHDL, Verilog, SystemC, C++, Python, Tcl, SystemVerilog)
  • Knowledge of XML IP-XACT standard is a plus.
  • Experience with C / C++, Perl, Tcl and Python. Knowledge of Java is a plus.
  • Good written and verbal communication skills in both French and English
  • Curious, autonomous, rigorous, and delivery-oriented with a commitment to quality and a thorough approach to the work.

Education:

Master degree in EE (Electrical Engineering) or CS (Computer Science)

About Arteris:

Arteris is a leading provider of system IP for the acceleration of system-on-chip (SoC) development across today’s electronic systems. Arteris network-on-chip (NoC) interconnect IP and SoC integration automation technology enable higher product performance with lower power consumption and faster time to market, delivering better SoC economics so its customers can focus on dreaming up what comes next.

With over 250 employees with headquarters in Silicon Valley and offices around the globe, we are a catalyst for SoC innovation so companies ranging from startups to the biggest technology market leaders can effectively create new products with proven connectivity flexibility and ease.  Learn more at arteris.com.

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