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Senior Design Verification Engineer

Senior Design Verification Engineer
by Admin on 06-17-2020 at 1:46 pm

Website ArterisIP

Job Title: Senior Design Verification Engineer
Location: Campbell, CA or Austin, TX
Organization: Arteris IP
Date posted: 2020-01-20

Do you want to contribute to the backbone of the some of the world’s most popular SoCs? You will work with an expert team to design and deliver interconnect & memory hierarchy solutions for some of the world’s most sophisticated mobile, telecom, automotive, and consumer SoC designs. You’ll create designs in a powerful language that blends traditional RTL with leading-edge software to provide extremely configurable, testable, and high-quality solutions. You’ll go home at the end of the day amazed at all the places where your creations end up. You will have the opportunity to be part of a proven-successful startup, and to influence development environment, architecture, verification, and everything in-between – you’ll no longer be stuck in a silo or just a cog in the machine. Your co-workers will be an experienced team of industry experts that love what they do.

Responsibilities:

  • Advanced UVM based test bench development and debugging
  • Defining, documenting, developing and executing RTL verification test/coverage at system level
  • Performance verification and power-aware verification
  • Triaging Regressions, Debugging RTL designs in Verilog and SystemVerilog
  • Help improve and refine verification process, methodology, and metrics
  • UVM expertise on complex SoC projects from test bench development to verification closure

Skills and Qualifications:

  • 10 or more years of design and verification experience and a plus in interconnect verification experience
  • Verification flow enhancements using a scripting language such as Shell scripts, Python & JavaScript
  • Strong RTL (Verilog) and UVM/C test bench debugging skills
  • Experience integrating vendor provided VIPs for unit and system level verification
  • Experience with Arm AMBA protocols
  • This opportunity involves high performance, low power designs on a highly visible project

Arteris IP offers a dynamic and challenging work environment for experienced professionals. Our employees receive competitive compensation and benefits, and the ability to be an important part of an increasingly larger global team at Arteris IP. We are on the leading-edge of the System-on-Chip (SoC) movement and working with some of the world’s largest and most technically advanced customers. Join our outstanding team consisting of some of the most technically advanced engineers and help develop the industry’s emerging standard for on-chip traffic transport and management for complex, IP-laden SoC designs.

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