Senior ASIC Design Engineer

Overview

This role is to join Pragmatic’s dynamic IC design team in Cambridge to develop efficient digital hardware using our disruptive flexible chip technology. Digital hardware design includes ASICs and custom CPUs for disruptive applications such as fast-moving consumer goods, personal medical devices, and consumer electronics. The candidate is expected to work as part of a multifunctional team to develop prototype (and potentially productised) ICs, to generate IP (e.g., patents), and to disseminate results (e.g., high impact publications).

Qualifications and training

• MSc or PhD degree in Computer/Electronic Engineering or Computer Science (essential)

Skills and experience

• Proficiency in RTL (Verilog or SystemVerilog)
• Strong experience in FPGA prototyping of digital ASICs
• Good experience in CPU instruction set architectures (e.g., RISC-V, ARM), microarchitecture design principles or hardware accelerators
• Good experience in front-end EDA tool flows (e.g., simulation, synthesis)
• Good experience in high-level and scripting languages (e.g., C/C++, Python, tcl)
• Experience in digital ASIC implementation (e.g., place-and-route, clock tree synthesis) – desirable
• Experience in Machine Learning (ML) model development and hardware accelerator design – desirable
• Familiarity with design verification (e.g., SVA, formal verification) – desirable
• Familiarity in open-source digital EDA toolflow (e.g., OpenROAD) – desirable