Senior ASIC Digital Design Engineer

INTRODUCTION TO ROLE

Our client is looking for a Senior ASIC Digital Design Engineer to join our team. We encourage candidates with a strong background in digital design to apply to this position.

The successful candidate will earn valuable experience in a fast moving, collaborative, and high performing Startup environment.

The Senior ASIC Digital Design Engineer will report directly to the Director of ASIC Engineering and will be expected to work a total of 40 hours per week.

The candidate can be based in Toronto or Montreal.

RESPONSIBILITIES AND DUTIES

1. Develop and implement digital circuits for ASIC projects, ensuring functionality and adherence to design specifications.
2. Perform synthesis and optimization to meet performance, area, and power targets.
3. Coordinate with cross-functional teams for seamless integration of digital designs into larger systems.
4. Prepare comprehensive design documentation, including specifications, test plans, and implementation details.

REQUIRED SKILLS

1. BSEE or MSEE with a minimum 5 years experience in digital design.
2. Familiar with Verilog and Xcelium. Good knowledge of back-end synthesis tools such as Genus/Innn Shell, Perl, Python, and TCL is a plus.
3. Experience in defining synthesis constraints and STA.
4. Scripting experience, and ability to apply good design quality while meeting tight deadlines
5. Ability to produce clear and comprehensive design documentation.

DESIRED SKILLS

1. Understanding of digital logic and verification flow.
2. Experience in synthesis and achieving timing closure.
3. Problem-solving and analytical skills.
Works well under pressure and has great time management skills.