Arteris enables engineering and design teams at the world’s most transformative brands to connect and integrate today’s system-on-chips (SoCs) that fuel modern innovation.
If you’ve held a smartphone, driven an electronic car, or powered up a smart TV, you’ve come in contact with what we do at Arteris. Here, the future is quite literally in your hands—and when it isn’t, chances are it is flying overhead in a drone, a satellite, or in the cloud at a datacenter!
The candidate will be in charge to develop and upgrade innovative and powerful description language and its software framework, composed of the associated design libraries as well as all the middleware layer stack required to build the configurable digital logic.
- Lead the development of a powerful language and the associated leading-edge methodology enabling design of extremely configurable IP blocks
- Specify and develop the related libraries and data model supporting the semantic of Arteris configurable ÏPs
- Invent and design the upper layer stack to connect to Arteris tools and workflows
- Communicate with Hardware, Software and Documentation teams about your changes to ensure product cohesion.
- Maintain and enhance the design development flow methodology to increase automation
Experience Requirements / Qualifications:
- 8+ years of experience in SW development,
- Proficient in functional & Object Oriented programming (Scala, Java, C++ or Python…),
- Experience with data structures and compilers,
- Excellent problem solving, strong communication and teamwork skills,
- Self-driven, able to work with minimum supervision.
- Had work within Electronic Design Automation environment, and know basic logic design environment and methodology,
- Knowledges in HW description language (Verilog, system Verilog, …),
- Experience with digital HW generators, methodology and concept (Chisel)
PhD or master’s degree in Computer Sciences or related field.
The position is staffed in Sophia Antipolis (06), France, as part of the advanced engineering team
Arteris is a leading provider of system IP for the acceleration of system-on-chip (SoC) development across today’s electronic systems. Arteris network-on-chip (NoC) interconnect IP and SoC integration automation technology enable higher product performance with lower power consumption and faster time to market, delivering better SoC economics so its customers can focus on dreaming up what comes next.
With over 250 employees with headquarters in Silicon Valley and offices around the globe, we are a catalyst for SoC innovation so companies ranging from startups to the biggest technology market leaders can effectively create new products with proven connectivity flexibility and ease. Learn more at arteris.com.
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To view the job application please visit www.arteris.com.