Tensilica IP division of Cadence is looking for an experienced and motivated engineer to join our systems modeling team in Noida. The candidate will work on extending and improving the product portfolio and the solution to the customers which includes Instruction Set Simulator (ISS) for various DSPs, accelerators, software tools and other components to the customers.
Key responsibilities include:
- Development and validation of simulation models for processor cores, NoC, SoC components and accelerators and other IPs.
- Working closely with IP/NoC architects, system software teams to create compliant models with high fidelity.
- Running functional simulations and doing performance analysis of the models, using RTL test benches, emulators etc.
- Developing framework/infrastructure, while working closely with the ISS and software tools teams to improve the product offering.
- Degree (Masters/Bachelor or equivalent) in Computer/Electrical Engineering or related field.
- 8+ years of industry experience in development of simulation models, system level performance analysis or architecture exploration.
- Strong understanding of computer architecture, simulation-based modeling, Network-on-Chip (NoC)/Interconnect architecture, and bus protocols like AXI.
- Prior experience in NoC/interconnect/fabric development is a big plus.
- Good experience in system level model development using C/C++, SystemC.
- Possess good software engineering skills such as Linux/Windows, perforce, gdb, JIRA etc
- Excellent problem solving and analytical skills.
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To view the job application please visit cadence.wd1.myworkdayjobs.com.