Power Integrity Applications Engineer
Website Cadence
Ideal candidate should have:
1. Strong ability to solve electrical and electronic circuits.
2. Excellent knowledge on how power, IR, and EM analyses impact chip planning to IR/EM sign-off.
3. Knowledge of package analysis and die modeling.
4. Parasitic Extraction.
5. Software debugging skills
6. Excellent background with at least one scripting language such as Python or Tcl and good understanding of basic algorithms.
7. Basic idea of EDA industry and how EDA industry fits into the larger Semiconductor industry eco-system.
8. Alacrity to be an excellent team player.
9. Strong willingness to collaborate on debugs and problem solving with other AEs on the team.
10. Discipline and determination to grow as a key member of the AE team.
The Data Crisis is Unfolding – Are We Ready?