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Physical Design Methodology Engineer

Physical Design Methodology Engineer
by Admin on 05-03-2024 at 2:54 pm

  • Full Time
  • Burlingame, CA
  • Applications have closed

Website Quadric

Role

As a member of our physical design methodology team you will be tasked with developing physical design methodologies and automation scripts for multiple design configurations across multiple process nodes.

Responsibilities

  • Develop Quadric processor IP implementation scripts from RTL to GDS across multiple advanced process nodes.
  • Preform test chip tape outs as necessitated by architecture innovation.
  • Collaborate with the architecture team to optimize PPA.

Requirements

  • MS or Ph.D. in Electrical Engineering with a minimum of eight years of CPU/GPU/ASIC implementation
  • Proficiency in TCL scripting
  • Proficiency in chip front-end and back-end implementation tools such as Design Compiler, PrimeTime, ICC2 & Fusion Compiler.
  • Experience with 16nm and below process technologies.

Nice to haves:

  • Knowledge of lower power digital design techniques.
  • IP integration experience.
  • Experience in data parallel hardware design for high-performance computing

Benefits

  • 401k, Medical, Dental & Vision coverage
  • Provide competitive salaries and meaningful equity
  • Enable a politics-free community for the brilliant minds who want to make an immediate impact
  • Provide an opportunity for you to build long term career relationships
  • Foster an environment that allows for lasting personal relationships alongside professional ones
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