Your role and responsibilities
Within the Hardware Design team, in the context of customer and Road-map projects, your missions will be as follows:
- Configure the various Process Design Kits from multiple foundries (TSMC, GF, ST, …) on the workstations;
- Execute/maintain the logic synthesis flow, the Placement and Routing (PAR) flow and the various additional phases of the ASIC design flow;
- Help consolidate current IP component flows whose behavior depends on ASIC process properties;
- Develop and improve the design flow (RTL2GDS);
- In a testchip context, participate in the definition of the chip’s physical constraints (PADs, anticipation of packaging constraints, timing constraints, external components), participate in the definition of communications interfaces and analysis instrumentation;
- Write scripts to automate the flow (Tcl, Python, Bash, Makefile)..
Education, Experience & Skills
- Master degree in electronics/micro-electronics or equivalent;
- You have at least 3 years’ experience in a similar position;
- To join our multicultural environment, you must be fluent in English;
- Knowledge and previous professional experience in FPGA/ASIC design;
- Knowledge of back-end flow (synthesis, routing placement);
- Knowledge of ASIC-oriented design tools from Cadence (RC/Genus/Encounter/Innovus) or Synopsys (DC/ICC2);
- Knowledge of a file revision management tool is a plus (Git ).
Secure-IC is committed to equal opportunity and diversity. Our positions are therefore open to people with disabilities. Only skills and motivation make a difference.
Apply for job
To view the job application please visit www.secure-ic.com.