Lead Product Validation Engineer

Description

• Troubleshoot customer issues.
• Track product defects and report status including fixed product branches/releases.
• Report regression result and new feature test status.
• Review Functional Specs and work with the author to improve them.
• Create and review Test Specs to validate new emulation-software features.
• Create and review emulation/simulation testcases, including RTL and scripts.
• Maintain regression runs and results reports.
• Report product defects, and work with other team members and R&D to debug testcase failures

Requirements

• BS Degree and 5+ years of experience in the Design and Verification domains.
• Strong communication skills oral and written in team environment.
• Proficient with Agile/Scrum program management.
• Expertise with Jira/CCMS and P4 (perforce).
• Experience in writing programs and shell scripts (Python required).
• Experience with any of job scheduling system: IBM LSF, Altair NC, etc.
• Expertise in coding and debugging synthesizable designs (RTL) in Verilog/SystemVerilog. VHDL is a plus.
• Experience in Verification (design/debug) with Simulation EDA tools (Cadence/Others). Emulation/Hardware Accelerated Verification experience is a plus.
• Reviewing features specifications and creating comprehensive verification plans.
• Designing a regression strategy for test coverage and runtime optimization.