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IO Silicon Validation Manager

IO Silicon Validation Manager
by Admin on 08-14-2023 at 3:57 pm

Website Synopsys

Silicon learning is important for any design team to make robust products and maintain customer confidence

We are looking for a person for GPIO+ Si Validation with below role description

1. Responsible for post silicon product qualification of test chips including PVT characterization , ESD qualification , HTOL testing

2. Setup a team for Si-validation in India, work with vendors within and outside India for IO validation

3. Develops packages, hardware and software to implement methodologies to ensure products are designed for manufacturability, functionality, testability, reliability and quality

4. Work with cross functional teams such as analog designers, digital designers and application engineers in devising experiments, driving data collection, and presenting results

5. Supports marketing teams in customer demonstration of product

6. Support application engineers in supporting customers issues and debugs.

7. Would Interface with ESD test house to get ESD test results as per Industry standards

8. Would ensure testchip padframe , package , board and test requirements are aligned

Required Experience

1. Typically with minimum of 12+ years of related experience.

2. Specific experience should include:

a. Testing of GPIO, LVDS, I2C IO-pin circuits on ATE and on bench-top set-ups
b. Data collection using bench-top test equipment and software tools similar to Lab-View
c. Test data review
d. Specification of test hardware for ATE testers, bench top tests, and life testing
e. Specification of chip packaging
d. Management of ESD and latch-up testing by external labs, investigation of results
e. Wafer Acceptance Test “WAT” data review

Apply for job

To view the job application please visit sjobs.brassring.com.

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