Intern (Technical-Engineering)

Job Description and Requirements

Industry leading simulation solution:

The Synopsys simulator delivers first class verification performance and capacity for all classes of design, including, custom digital, memory and analog/mixed-signal circuits. The comprehensive offering includes advanced analysis options for native circuit checking, power, signal and reliability analysis and mixed-signal simulation. Designer productivity is negatively impacted by the overwhelming number of simulations that need to be run. Not only is the number of simulations increasing, but the size of circuits, combined with extracted post-layout parasitic, is far exceeding the capacity of traditional simulation solutions. Synopsys’ market leading simulators are built on best-in-class technologies that deliver increased productivity and designer confidence to address today’s AMS verification challenges.
Synopsys Custom Design Platform, provides features for design debug, simulation management, reporting, mixed-signal design entry and custom layout editing features. It delivers industry-leading productivity, performance, and ease-of-use while remaining easy to adopt for users of legacy tools.

Responsibilities:

As an Intern in simulation, you will be working on industry leading FastSPICE tools in simulation. You will be involved in certifying the simulation tools for specific foundries at an engineering level. You are expected to debug the technical issues and should able to effectively translate the findings into requirements to improve tool behavior. In order to perform various analyses and debug various design issues, you will be required to learn and support the overall Custom Design Platform.    

Requirements:

• B.Tech/M.Tech in Electronics/VLSI domain.
• Solid understanding of circuit designs and related design methodologies.
• Good knowledge of digital electronics concepts and familiarity with ASIC design flow, and/or VLSI design methodologies.