Intern software development for Verilog-A simulator

– Familiar with Spice, Verilog-A, Verilog-AMS language
– Skilled in Python programming, familiar with development under Linux/Unix environment.
– Analog circuit or digital simulator development experiences is a plus
– Good mathematic background & knowledge is a plus
– Be familiar with Analog Mixed-signal design is a plus
– EE or CS Master degree with related working experience