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Website Cadence
– Familiar with Spice, Verilog-A, Verilog-AMS language
– Skilled in Python programming, familiar with development under Linux/Unix environment.
– Analog circuit or digital simulator development experiences is a plus
– Good mathematic background & knowledge is a plus
– Be familiar with Analog Mixed-signal design is a plus
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[_readOnly:protected] =>
[_writePending:protected] =>
[_writeRunning:protected] =>
[_errors:protected] => Array
(
)
[_whenSaveable:protected] => Array
(
)
[_cascadeSave:protected] => Array
(
)
[_behaviors:protected] =>
)
)
[populated:protected] => 1
)
Facing the Quantum Nature of EUV Lithography