Summary / Role Purpose
If you would like to gain first experience in 3DIC Signal and Power Integrity design, join Ansys for an internship! As an Intern Engineer (m,f,d), you will have an opportunity to explore advanced packaging technologies such as silicon interposers used in today’s mobile and computing solutions. You will develop vertical workflows for full Signal Integrity and Power Integrity checks of complex layouts.
This is a great opportunity to gain in-depth experience with EDA tools using Ansys Electromagnetics solvers, state of the art designs and automation.
You will work in a small team to:
– Familiarize yourself with best-in-class EM solvers
– Learn about Chip/Package/System workflows and methodologies.
– Expand your skills in 3D IC Signal and Power integrity workflow
– Python coding and data management
– Develop yourself by working on real case scenarios in a multinational engineering team.
– Create an example and document the workflow for easy reuse by a wider audience.
– Present your results to the internal engineering community.
- BEng in Electronics / Micro-Electronic Engineering, or Computer Science, or equivalent
- Basic knowledge of Python
- Good English skills
- Experience in Electromagnetic simulation, RFIC, Highspeed Digital design and Power Integrity
- Knowledge of HFSS/Circuit simulator
- Knowledge of Python
- Team player, responsible, and motivated
Duration: 6 months.
Location: Ismaning (Germany) preferred, Lyon (France)
Apply for job
To view the job application please visit careers.ansys.com.