Graduate Engineer – Circuit Design Methodology

How would you like to join Arm at a time of transformation in our industry?

Our physical design group comprises some of the industry’s leading experts in deep submicron circuit design. This position is a rare opportunity for you to work with our standard cell design and layout teams. You will work on a wide variety of groundbreaking foundry technologies while collaborating with our team on many different types of logic circuits.

Job Description:

We are seeking a highly motivated graduate to join our standard cell circuit design methodology team. The successful candidate will work with a small team of experienced integrated circuit design engineers to:

• Maintain and develop a database of internally developed IP that drives the design, modeling, characterization, and QA flows of standard cell libraries across multiple process technologies
• Collaborate with circuit design engineering, layout and software automation teams to build solutions that improve the design flow
• Evaluate and apply proprietary design techniques, internally developed software tools, and externally supported EDA tools to implement design and verification methodologies
• Enable IP creation, validation, modeling, benchmarking, and release for standard cell library products in various foundries and technology nodes

Responsibilities:

• Accountabilities and responsibilities will include, but are not limited to the following:
• Schematic and symbol design including traditional logic cells as well as sophisticated power management cells
• Developing spice simulation source for tuning and margining of electrical circuits
• Develop and test EDA tool configurations required for view modeling and verification
• Ensuring quality through regression testing and QA checks

Required Skills and Experience:

• Master’s or PhD in Electrical Engineering, Computer Engineering, or other relevant technical fields
• Fundamental understanding of MOSFET electrical characteristics and transistor level device physics
• Understanding of layout and circuit design to collaborate with the mask design and engineering teams
• Transistor level spice simulators, e.g Hspice, Spectre
• Transistor level design of static circuits including state retaining elements like latches and flops
• An understanding of power, performance, and area tradeoffs at the cell and block level
• Understanding or an ability to learn industry standard modeling formats including: Liberty (NLM, CCS, ECSM, and LVF), Verilog, LEF, NDM, Spice, and APL
• Programming and scripting skills in UNIX, Perl, Python, C++ or similar language
• Ability to debug intricate issues and clearly summarize and report the status to colleagues

“Nice To Have” Skills and Experience:

• Experience with SKILL and XML
• Ability to diagnose and report EDA tool related issues
• Experience with Synthesis, Place and Route flows