Foundry Interface Engineer
Website Verisilicon
Descriptions
- Interface with external foundry and internal design/Operation/PMO/Sales groups.
- Study design manual of different foundry & tech node, based on device list and GDS list to calculate mask quantity, provide exact information to purchase team for quotation reference.
- Handle tape out activities without delay and mistake, do job view, define corner split, trace and pull in lot schedule, review WAT, keep NTO succeed.
- Support internal Design/ Sales/Purchase team to do new Fab and new process survey for pre sales cases. Attend foundry symposium, and collect newest tech node progress.
- Working with external foundry and internal engineer team to resolve wafer manufacturing technical issue, during new tape out stage, risk run stage and mass production stage, keep doing yield improvement, handle Foundry inline excursion, PCN, RMA etc.
- Apply PDK/Library/ Foundry IP/tech files per project needs, manage multi foundry accounts.
- Hold periodic meeting with foundry for technical topics. Arrange QBR/QTR.
- Support internal QA team solve foundry related quality problems, attend foundry audit.
Requirements
- Degree of Bachelor or above in engineering field, major in EE is preferred, work experience and rank are not limited.
- Experience in foundry PIE/ Product/ R&D/ Device is preferred, the tape out experience is a plus.
- Strong background in wafer process technology, be familiar with FinFET experience is highly preferred.
- Be able to do yield, inline, WAT data analysis with EDA tooling.
- Have strong communication and interpersonal skills in English.
Apply for job
To view the job application please visit www.verisilicon.com.
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