Arteris enables engineering and design teams at the world’s most transformative brands to connect and integrate today’s system-on-chips (SoCs) that fuel modern innovation.
If you’ve held a smartphone, driven an electronic car, or powered up a smart TV, you’ve come in contact with what we do at Arteris. Here, the future is quite literally in your hands—and when it isn’t, chances are it is flying overhead in a drone, a satellite, or in the cloud at a datacenter!
Do you want to contribute to the backbone of some of the world’s most popular SoCs? Are you customer focused and at the same time technically savvy?
We are looking for a Field Application Engineer to support our cache coherent, noncoherent interconnects and standalone cache products.
As a Field Application Engineer at Arteris, you will work with an expert team to support and deploy on chip interconnect/fabric and memory hierarchy solutions for some of the world’s most sophisticated mobile, telecom, automotive, AI and consumer SoC designs.
Using your strong background in System design, SoC architecture and RTL, and your enthusiasm for technology, you will take part in pre-sales activities to convince potential customers of the technical benefits of our technology. You will also take part in post-sales support for some of the most interesting and advanced customers in the semiconductor industry.
- Understand the customer’s technical challenges and work with them to solve complex problems
- Provide expert advice and training to the customer on how to leverage Arteris IP in their SoC/ASIC
- Negotiate the requirements with customers to facilitate Arteris products adoption in some of the leading chips being designed today.
- Work with an expert team to support and deploy interconnect and memory hierarchy solutions for some of the world’s most sophisticated mobile, telecom, automotive, AI and consumer SoC designs.
Skills and Experience:
- BS/MS in Electrical Engineering or equivalent
- At least 5 years of relevant front-end digital SoC/ASIC design experience, from RTL to synthesis
- Working knowledge of SoC architecture, including CPU integration, DDR, optimization techniques to achieve power, performance, and area goals
- Familiarity with the ARM and RISC-V ecosystem (CPU, interfaces, fabrics)
- Knowledge of Python or Perl scripting
- Familiarity with cache and cache coherency
- Knowledge of TLM / SystemC modeling, UVM or physical design flow is a plus
- Be motivated to train and educate others and help them solve complex problems
- Have experience in a customer facing roles and/or working with a sales team
- Be a self-starter, excellent problem solver and results-driven individual
- Good presentation and organizational skills
Arteris is a leading provider of system IP for the acceleration of system-on-chip (SoC) development across today’s electronic systems. Arteris network-on-chip (NoC) interconnect IP and SoC integration automation technology enable higher product performance with lower power consumption and faster time to market, delivering better SoC economics so its customers can focus on dreaming up what comes next.
With over 250 employees with headquarters in Silicon Valley and offices around the globe, we are a catalyst for SoC innovation so companies ranging from startups to the biggest technology market leaders can effectively create new products with proven connectivity flexibility and ease. Learn more at arteris.com.
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To view the job application please visit www.arteris.com.