- BE/B.Tech./MS/M.Tech. (Electronics or Electronics & Communication)
- Worked on SoC level testbench and verification environment
- Testbench architecture, coding and good understanding of design issues in RTL
- Testbench generation, testvector creation, simulations, gate level simulations
- Hands on with System Verilog and Assertion based verification methodology
- Atleast 4years of experience on HVL (System Verilog, Vera, Specman, E, VMM, OVM, UVM)
- Should be able to work independently and able to guide other team members
- Problem solving capabilities with leadership qualities
- Should have managed a team of 10 or more engineers
- Knowledge of RTL coding styles
- Low power verification (UPF/CPF) would be an added plus
- Experience on System C would be an added plus
- Worked on protocols like AMBA AHB/AXI, MIPI, PCI Express, SATA, USB
Email your resume to firstname.lastname@example.org and mention position/location in the subject.
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