On this complementary team, we have an open and relaxed environment where outstanding, creative engineers work together on significant projects. Our upbeat and collaborative team builds CPU designs that impact how people connect every single day.
Whether you consider yourself an experienced CPU micro-architect or an expert RTL design engineer, this role offers you ambitious and exciting responsibilities with forward-thinking colleagues and the ability to make an impact on our industry. At our Austin-based design center, you will join a small, rare and hardworking RTL design team developing the next generation Arm A-class microprocessors. You will contribute in all aspects of the microprocessor life cycle from developing the specification, defining the microarchitecture and coding the RTL design to deliver Arm’s next dynamical, energy efficient microprocessors to meet the demands of the market.
You will use groundbreaking technologies and methodologies to ensure the highest quality products as you collaborate with other Arm engineering teams to build complete IP solutions to address the performance, power and cost requirements for almost all application markets.
What will you be doing?
• You own and develop CPU microarchitecture specification and design
• You handle Verilog RTL logic design and debug
• You work closely with engineers across performance modeling, validation, and implementation to meet all functional requirements, performance, power and area goals
What skills, experience, and qualifications do I need?
• Master’s degree in Electrical Engineering or Computer Engineering
• Minimum 5 years of post-degree work experience in processor RTL and microarchitecture design (think senior/staff types)
• Bachelor’s degree in Electrical Engineering or Computer (in one of these fields or another relevant field) along with at least 7 years of confirmed experience may be substituted
What meaningful contributions do we favor in your prior experience?
• Domain expertise in various logic areas of CPU microarchitecture design – specifically areas in LoadStore memory subsystem design including: TLB, cache, hazard checking, speculative execution, coherency protocols, etc.
• High-performance, low-latency execution, high area-efficient and power-efficient processor design
• RTL design for multi-threaded, low-power microprocessors
• Hands-on experience using Verilog or VHDL HDL for design
• Crafting for synthesis targeted to achieve specified power, frequency, and area targets
• Make good judgements on functionality, performance, and physical implementation trade-offs
• Scripting, e.g. with Perl, Python, etc.
What else is needed for you to consider before applying?
• The capability to travel occasionally for training and customer meetings
Apply for job
To view the job application please visit careers.arm.com.