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ASIC/Layout Design Engr, II

ASIC/Layout Design Engr, II
by Admin on 11-16-2022 at 11:31 am

  • Full Time
  • Noida, India
  • Applications have closed

Website Synopsys

Responsibilities: This role requires the incumbent to contribute towards backend design for customer projects, help in revising and debugging existing products, create relevant documentation for company products, and run product QA and resolve issues thereof.

Requirements:

  • Fundamentals of CMOS, Fabrication Methodology.
  • Understanding of layout design methodologies Tools: Should be well versed with Layout Design Tools and Verification Tools.
  • Have basic knowledge of design standards and practices.
  • Should be able to handle basic leaf-cells layout and verification exclusively.
  • Have working knowledge of basic design tools.
  • Maintain accurate and thorough documentation of work. Be a positive participant and energetic team member.
  • Has a dedicated desire to learn and explore new technologies.
  • Demonstrates good debug and problem-solving skills.
  • Prior knowledge and experience of Layout Design and Verification tools are required.
  • Typically requires a 3+ years of related experience
  • Apply basic problem-solving skills.
  • Able to do project status reporting.
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