ASIC Digital Design Engr, II
Website Synopsys
Job Description and Requirements
This role involves verifying semiconductor integrated digital and mixed signal circuits. You will work with global design and verification team to understand verification requirements and build verification solutions to achieve the quality metrics.
Responsibilities
- Exercise various aspects of the verification flow
- Evaluate verification closure metrics e.g. checks, assertions, functional coverage and code coverage
- Develop verification environment
- Write test cases for functional verification and code coverage
- Debug failures in design and verification environment
Key Qualifications
- BE/BTech and/or ME/MTech in Electrical/Electronics/Computer Engineering
- At least 2+ years of experience in the relevant field.
- Hands-on proficiency in digital and mixed signal design verification processes
Required Skills
- Working experience in developing HVL (System Verilog) based test environments, developing, and implementing test plans.
- Working experience in implementing and extracting verification metrics such as functional and code coverage.
- In depth knowledge of one or more Industry standard simulators used in Verification and relevant debugging tools.
- Experience in verification methodologies such as UVM/VMM/OVM is required.
- Good written and oral communication skills and demonstrated good data-backed debug and problem-solving skills.
- Experience of one or more of the connectivity protocols such as USB, PCI Express, Ethernet or AMBA.
- Familiarity with HDLs such as Verilog and scripting languages such as Perl/Python is desired.
- Familiarity with the USB specification is preferred.
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