ASIC and Firmware Design Engineer, Sr II

Job Description and Requirements

At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.

Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.

ASIC and Firmware Design Engineer
Seeking a highly motivated and innovative digital design and verification engineer with strong theoretical and practical background in high-speed data recovery circuits. Working as part of a highly experienced mixed-signal design team, the candidate will be involved in design and verifying current and next generation Backplane Ethernet, PCIe, SATA, and USB 2/3 SERDES products. The position offers an excellent opportunity to work with an expert team of digital and mixed signal engineers responsible for delivering high-end mixed-signal designs from specification development to performing functional and performance tests on the test-chips. 

Responsibilities of this job include:

• ASIC design and verification;
• Firmware design and verification;
• ASIC flow of synthesis, CDC;
• analyzing digital and analog specification;
• creating analog model based on schematic and analog function;

• writing modular constrained-random verilog and system-verilog testbenches;
• performing functional coverage;
• assertion coverage, and code coverage;
• creating and tracking testplans;
• analyzing failure cases and running gate-level simulations.
• FPGA debug and customer case debug

Requirements:

• The successful candidate will have preferred MSEE with at least 5 years of digital design and verification industry experience
• Must have hands-on experience in ASIC design flow, Verilog coding, synthesis….
• Must have hands-on experience in writing complex testcases in Verilog, System Verilog, and UVM test bench
• Must have familiarity with code quality metrics.
• Must have ability to create specification for system level overview of digital and analog
• Knowledge of the following:
  • high-speed digital & mixed-signal design
  • asynchronous clock crossings
  • DFT design methodologies

• good organization and communication skills for interacting between different design groups and customer support teams.

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.

Synopsys Canada ULC values the diversity of our workforce. We are committed to provide access & opportunity to individuals with disabilities and will provide reasonable accommodation to individuals throughout the recruitment and employment process. Should you require an accommodation, please contact hr-help-canada@synopsys.com.