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Analog & Mixed Signal System Modelling Engineer

Analog & Mixed Signal System Modelling Engineer
by Admin on 02-01-2023 at 1:39 pm

Website Synopsys

You will be part of an R&D team developing 32Gbps NRZ and 64-112Gbps PAM4 serial-link (SerDes) transceivers. We are looking for an engineer with theoretical knowledge and practical experience to join our team. You will work with a cross-functional team of analog and digital designers, and hardware engineers.

You will be involved in all stages of development including:

  • Modelling: updating and maintaining SerDes system models
  • Sign-off: running system simulations to verify design performance across multiple protocols and channels
  • Silicon: correlating simulated performance with silicon measurements
  • Customers: assisting customers with system-level performance issues

You have an M.Sc. or Ph.D. in Electrical or Computer Engineering.

Due to the cross disciplinary nature of this position, key qualifications include one or more of the following:

  • Modelling – experience modeling circuits and systems in MATLAB/Simulink
  • Analog – experience designing high-speed analog CMOS circuits
  • Digital – experience with DSP
  • Communications theory – experience with equalization, coding, noise/crosstalk filtering

Beneficial Experience:

  • Experience analyzing link budgets for NRZ and/or PAM4 high-speed serial links
  • Experience modelling of SERDES transmitters and receivers in MATLAB or similar tool
  • Knowledge of circuit topologies used in high-speed SerDes Tx/Rx
  • Knowledge of Tx/Rx equalization techniques
  • Knowledge of CDR architectures and CDR loop dynamics
  • Knowledge of common high-speed serial data protocols including PCIe, 10G/25G/56G/112G Ethernet, JESD204C, CPRI
  • Experience with lab tests for high-speed serial links
  • Experience with C/Verilog-A/systemVerilog
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